The 3rd Digital India RISC-V (DIR-V) Symposium 2026 began at IIT Madras’s Research Park in Chennai on Saturday, August 1, and will continue through August 2, 2026.
The event is organised jointly by IIT Madras, the Ministry of Electronics and Information Technology (MeitY) and RISC-V International, drawing policymakers, global technology experts, researchers, startups, investors, faculty and students to Chennai.
This year’s theme, ‘Empowering Bharat’s Semiconductor Future,’ spans indigenous processor technologies, secure computing systems, hardware innovation, artificial intelligence and the country’s growing RISC-V ecosystem.
Attendees can expect keynote addresses, technical sessions, panel discussions, hands-on workshops, technology demonstrations, exhibitions and startup showcases, along with the DIR-V Grand Challenge Hackathon showcasing RISC-V-based work by students and startups.
In-person registration closed on July 26, 2026, after the venue reached full capacity, though the symposium is being live-streamed on YouTube, with no registration needed to follow along.
As a licence-free, open-standard instruction set architecture, RISC-V has become central to India’s efforts to build indigenous chip design capacity and cut reliance on imported processors.
IIT Madras Research Park, the venue for this year’s symposium, has emerged as a hub for deep-tech startups working on hardware, semiconductors and embedded systems in the country.
Previous editions of the DIR-V symposium have drawn participation from chip designers, academic researchers and government officials, reflecting the event’s role as a meeting point for India’s RISC-V ecosystem.
MeitY has separately backed the development of indigenous RISC-V-based processors under its Digital India programme, part of a broader effort to build chip design capability alongside manufacturing incentives.
The Chennai event follows two earlier editions of the DIR-V symposium, each of which expanded in scale as more startups, research institutions and global chip companies engaged with India’s RISC-V initiatives.
RISC-V is an open-standard instruction set architecture that has drawn growing interest from chipmakers worldwide because, unlike proprietary architectures, it can be used and modified without licensing fees.
Photo by Tester051005, Wikimedia Commons, CC BY-SA 4.0
